Toshiba has adopted the Cadence Innovus implementation system for its memory controller's production design project, according to the EDA company. The tool enabled Toshiba to achieve an optimal target performance while creating a 16% smaller place and route (P&R) area for random logic with 25% lower power consumption when compared with its previous solution.
from DIGITIMES: IT news from Asia http://ift.tt/1TtPBYx
via Yuichun
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