JTAG Technologies and Altium have combined to offer the circuit board designer the capability to assess the JTAG/boundary-scan testing resources on their design before committing to layout. Called JTAG Maps it is available as a free extension for the Altium Designer tool. Boundary-scan device models (BSDLs) are used for JTAG/boundary-scan testing as they indicate which ...
Read full article: JTAG Tech and Altium map boundary scan devices
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