RISC-V simulation company Imperas Software has announced a partnership with Breker Verification Systems, a provider of test content synthesis for verification environments, to develop interfaces and standards to unify functional verification design flows. “RISC-V represents an inflection point for semiconductor verification as the design freedoms provided by the open instruction set architecture means an assumption ...
The post Imperas and Breker partner for Risc-V system-level verification appeared first on Electronics Weekly.
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