Cadence Design Systems has implemented root-cause analysis in its latest chip design debug tools.
It relies on deeper and more comprehensive data gathering and is claimed to identify problems faster than traditional transaction-level debug methods which requires more than one iteration to extract data points needed to identify the source of the bug
Called Indago, the debug tools handles the large amount of data generated by root-cause analysis with filters that remove unneeded data to go beyond the source for a single bug to resolve the cause of all related bugs.
The Indago debug platform has three related apps can be used with other verification tools to provide a single integrated and synchronized debug solution for testbench, verification IP (VIP), and hardware/software debug for system-on-chip (SoC) designs.
The three debug apps are: the basic debug analyser, embedded software debug engine and protocol debug analyser for protocols such as DDR4, AMBA AXI and ACE.
Andy Eliopoulos, vice president, R&D for verification at Cadence writes:
“Leading-edge verification projects create terabytes of data every day, making debug a big data problem for semiconductor and system companies, engineers can now have a collaborative environment across multiple verification engines that both reduces the time to solve the discovered bug and the root cause for other bugs that may be buried in the data.”
from News http://ift.tt/1ENdiHr
via Yuichun
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