‘First’ RISC-V CPU certified compliant with ISO 26262

Andes Technology has introduced safety-enhanced RISC-V CPU intellectual property, claiming it to be “the first to certified to be fully compliant with ISO 26262 functional safety standards for the development of automotive applications”. SGS-TÜV Saar audited the core, called N25F-SE, and certified it to ASIL B according to ISO 26262 including Parts 2, 4, 5, ...

The post ‘First’ RISC-V CPU certified compliant with ISO 26262 appeared first on Electronics Weekly.

from | Electronics Weekly https://ift.tt/H3RWmCb
via Yuichun