Cadence Design Systems has announced its work with TSMC in 5nm and 7nm+ FinFET chip design for mobile devices. Cadence said its digital, sign-off and custom/analogue tools have achieved the latest Design Rule Manual (DRM) and SPICE certification for the silicon foundry’s 5nm and 7nm+ processes. Cadence will presents details of the work with TSMC ...
This story continues at Cadence has sign-off for TSMC 5nm and 7nm+ FinFETs
Or just read more coverage at Electronics Weekly
from News – Electronics Weekly https://ift.tt/2jlUGqQ
via Yuichun
沒有留言:
張貼留言