Synopsys tapes out DesignWare, Interface IP for TSMC 7nm FinFET process

Synopsys has announced the successful tape-out of a broad portfolio of DesignWare Foundation and Interface PHY IP for TSMC's 7nm process technology, including logic libraries, embedded memories, embedded test and repair, USB 3.1/2.0, USB-C 3.1/DisplayPort 1.4, DDR4/3, MIPI D-PHY, PCI Express 4.0/3.1, Ethernet and SATA 6G. Additional DesignWare IP, including LPDDR4x, HBM2 and MIPI M-PHY, is scheduled to tape out in 2017.

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via Yuichun