2019年10月18日 星期五

Tunnelling transistor offers logic and power on the same easy-to-make IC

Only eight lithography masks to create a low-power custom logic chips, compared with 20+ for CMOS, is the claim of Nottingham-based fabless chip start-up ‘Search For The Next’ (SFN). As such, production lead time is reduced – the target is two weeks by December 2020, according to company CEO David Summerland. Using just those eight layers, he ...

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