Global Unichip utilizes Cadence analog IP to implement WiGig-enabled SoC on 28nm process

Cadence Design Systems has announced that Global Unichip achieved first-silicon success integrating tri-band analog front-end (AFE) intellectual property (IP) with WiGig (IEEE 802.11ad), enabling integration of digital logic and analog monolithic die in an advanced 28nm complementary metal-oxide semiconductor (CMOS) process. The availability of the silicon-proven Cadence tri-band AFE IP running at 3.5 Giga-samples per second (GS/s) saved GUC's end customer over a year of total development time.



from DIGITIMES: IT news from Asia http://ift.tt/1EsuWgN

via Yuichun