2015年3月27日 星期五

Integre Brings x1 HyperLink DSP to FPGA

Integre's IP core allows a user-defined system to communicate with TMS320C66x multicore DSPs from Texas Instruments using a single lane high speed SERDES interface, or to another FPGA.



from EETimes: http://ift.tt/1BQDRmQ

via Yuichun

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