from DIGITIMES: IT news from Asia http://ift.tt/1m4nKi7
via Yuichun
The auto industry has a long history of borrowing ideas from the aerospace sector, ranging from aerodynamic styling to lightweight materials. The latest adoption is head-up display (HUD) technology, which was originally developed for fighter jets.
DETROIT—The Open Automotive Alliance, a consortium of automotive OEMs and technology providers like Google, has launched a new, automotive-specific operating system—Android Auto.
Knowles is shipping a digital MEMS microphone claimed to have the lowest power consumption on the market.
Aimed at consumer electronics, the multi-mode MEMS microphone offers a high Signal-to-Noise Ratio (SNR) within the low power mode, which enables voice controlled applications and maximises battery life.
The new microphone uses Knowles’ low power, “Always On, Always Listening” technology to provide a high SNR component with the lowest power draw in the world – lower than the conventional analog microphone and analog-to-digital converter combination.
Compared to other solutions, Knowles says that this digital multi-mode microphone adds value to consumer electronics by delivering up to 3x less power consumption than other digital microphones and is 20% smaller in size.
For consumers, this new product supports a longer battery life and enables accurate voice recognition in various settings, such as social gatherings and sporting events.
“Before this product, design engineers were forced to choose between microphones with a high SNR and microphones with a low current draw. Our “Always On, Always Listening” technology allows engineers to have both capabilities in one product,” says Knowles’ Thibault Kassir, Senior Director, Product Management, Mobile Consumer Electronics.
Product Details
· Product: High SNR digital bottom port microphone
· Part Number: SPH0641LM4H-1
· Measurements: 3.50 x 2.65 x 0.98 mm
Product Features
· Multiple performance modes (sleep, low-power, standard mode)
· Lowest power consumption in the market (3x less than other digital microphones)
· High Signal-to-Noise Ratio in low power mode
· Best acoustic performance per square millimeter
· Superwide-band capable
· Sensitivity matching for better algorithm performance
· Best in class RF immunity performance
Technical Data
· Signal-to-Noise Ratio: Nominal 64.3 dB(A)
· Flat Frequency Response: Up to 20 kHz
· Power consumption: 235µA in low power mode
· Size: More than 20% smaller than other digital microphones
· Sensitivity matching: ±1 dB
· Digital output: Serial PDM bit stream
A brief explanation of why FPGA are a lot more complicated to setup and get working that microcontrollers.
A short video linking to several other FGPA videos.
NOTE: This is very old footage that was meant to be part of a series of videos on trying out some FPGA demo boards. It’s been sitting around for too long, so I’m uploading all the footage I have now.
What is an FPGA
FPGA Implementation Tutorial
What is JTAG
FPGA Demo Boards
Forum HERE
Renesas’ RZ/A1 MPU is to be supported by the Giuliani GUI from TES Electronic Solutions.
Renesas’ RZ/A1 microprocessor (MPU) has been designed to give an optimal cost / performance balance for Human Machine Interface (HMI) applications.
The RZ/A1 Group incorporates up to 10MB of embedded SRAM, eliminating the need for external RAM.
Guiliani is a platform independent HMI framework designed for smartphone-like HMIs on embedded systems.
Being OS- and CPU-agnostic and without requiring an expensive hardware GPU, it covers a wide range of cost efficient MCUs and MPUs.
Guiliani is delivered with a customisable and extensible set of modern widgets and features like carousels, wheels, gauges, drop boxes, animations, transition effects, multi-language support and skinning.
Its Applying graphics processing features include sub-pixel accurate rendering, anti-aliasing, scaling, filtering and blending in combination with smart redraw and caching mechanisms.
Guiliani’s PC drag and drop editor and simulator support rapid HMI design and prototyping, resulting in fast development cycles.
Silicon Labs is sampling capacitive sensing microcontrollers (MCUs) for human-machine interfaces (HMI).
The C8051F97x MCU is for Internet of Things, home/building automation, consumer and industrial markets.
It targets battery-powered and capacitive touch sensing applications for handheld industrial devices, toys, gaming machines and remote controls, as well as touch-panel switch replacements for white goods such as washers, dryers, ovens and dishwashers.
The MCUs draw 200 µA/MHz active current, a two-microsecond wake time and a sleep mode energy consumption of 55 nA with brownout detector enabled and 280 nA sleep current with a 16.4 kHz internal oscillator.
They incorporate Silicon Labs’ SAR charge-timing capacitance-to-digital converter (CDC) technology which has 40 microsecond acquisition time.
Silicon Labs’ CDC technology offers superior noise immunity for reliable performance in challenging conditions and configurations such as thick laminate overlays, electrical noise or variances in printed circuit board (PCB) manufacturing.
This CDC hardware implementation is capable of measuring capacitance on a wide range of materials including PCBs, flex circuits, and indium tin oxide (ITO) on glass and film.
The F97x MCU family expands the capabilities of Silicon Labs’ C8051F99x low-power capacitive sensing MCUs with up to 43 capacitive sensing inputs, 32 kB flash memory, 8 kB RAM, seven DMA channels and a 16 x 16 multiply-accumulate (MAC) unit in QFN packages as small as 4 mm x 4 mm. The F97x MCUs integrate a 25 MHz pipelined 8051-compatible core, a precision oscillator, a 10-bit analog-to-digital converter (ADC), a temperature sensor, a voltage reference and four 16-bit general-purpose timer/counters.
Infineon is expanding its Austrian site in Villach in a project it calls “Pilot Space Industry 4.0”.
This, says Infineon, is an ‘ innovative concept for networked and knowledge-intensive production’.
Research on new materials and technologies will also be intensified.
Infineon’s expansion plans foresee investments and research costs amounting to a total of € 290 million, creating approximately 200 new jobs in the period from 2014 to 2017, primarily in R&D.
infineon’s Peter Schiefer, Says: “The continuing development of Villach is a part of our group-wide manufacturing strategy. At the site, important developments will be advanced and production-ready innovative technologies will be transferred by Infineon to other sites. At the same time our strategy will include expansion of our volume manufacturing on 300 millimeter thin wafers in Dresden and on 200 millimeter wafers in Kulim, Malaysia.”
Sabine Herlitschka, CEO of Infineon Austria, says: “With the expansion concept Villach is reinforcing its important role as a factory of innovation and a competence center for power electronics within the corporate group. We’re coupling the innovation factory in Villach with volume production in Dresden using the example of 300 millimeter thin wafer production for power semiconductors.”
Infineon will construct a complex for research, production and measurement technology workstations.
Logistics, miscellaneous infrastructures and the plant equipment will also be expanded to meet future demand. This will let Infineon mobilize the productivity and automation called for in international competition, while at the same time increasing flexibility.
Infineon has been actively engaged in the Industry 4.0 initiative from the very beginning; its pilot space in Villach is another step towards realising it.
A wide-scale research program with innovations in materials, processes, technologies and system expertise is the second pillar of the Villach site expansion, supporting development of the next generation of energy-efficient products.
Here the program focuses on the integration of innovative substrates such as gallium nitride and silicon carbide, on MEMS (Micro-Electro-Mechanical Systems) and sensor technologies as well as on the continuing development of 300 millimeter thin wafer technology.
Spansion is sampling its Traveo automotive microcontroller S6J3100 series with a CAN FD interface for in-vehicle networking.
The chip,is for various automotive applications including body control module (BCM), heating, ventilation and air conditioning (HVAC).
Bosch invented the CAN standard many years ago and since then worked to improve in-vehicle communication through innovative solutions. Bosch introduced CAN FD as a seamless upgrade of the classic CAN technology the first time at the International CAN Conference in 2012. Like classic CAN, CAN FD enables highly reliable vehicle control, taking advantage of higher data rates with only a small impact on current software and applications. Spansion has started to supply MCU products equipped with CAN FD.
As well as In the CAD FD interface operating at 5Mbps, the S6J3110 series comes with a maximum 4MB of flash memory and uses 55nm technology. It has Secure Hardware Extension (SHE) for network security and improved performance for connected cars, and partial wakeup for lowering power consumption.
The Spansion Traveo family of microcontrollers is based on the ARM Cortex-R5 core and tailored for a broad range of automotive applications.
In May 2014, Spansion introduced the first product of the family, the MB9D560 series for vehicle electrification utilised in hybrid electric vehicles (HEV) and electrical vehicles (EV).
TSMC will run at 100% fab utilisation throughout the second half of the year, reports Digitimes.
Digitimes is quoting Morris Chang who also said that 20nm would account for 10% of total revenues in Q3 and 20% in Q4.
45nm and better processes account for half total revenues.
TSMC says it has 20 customers for its 16nm finfet process.
The company says it will set up a 300-400 person R&D lab to develop a 10nm process scheduled for trial production in 2015 and mass production in 2016.
Total capacity in 2013 was 15.67 million eight inch wafer equivalents. In 2012, it was 14.04 million.
72 fabs were closed between 2009-2013 and another nine fabs are to close this year, says IC Insights.
Since mid-2007, the IC industry has been paring down older capacity (i.e. 200mm and smaller wafers) in order to produce devices more cost-effectively on larger wafers.
A few fabs have been refurbished for production using larger wafers or for production of “non-IC” products.
One example is a 300mm wafer fab operated by Sony that closed, but was retrofitted and has returned to service manufacturing image sensors for the company.
40% of fab closures since 2009 have been 150mm fabs. Qimonda was the first company to close a 300mm wafer fab after it went out of business in early 2009. ProMOS and Powerchip closed their respective 300mm wafer fabs in 2013.
Regionally, semiconductor suppliers in Japan have closed 28 wafer fabs since 2009, more than any other country/region over the past five years. North America (23) and Europe (15) also had double-digit fab closures
Fabs closed or on the bubble in 2014 include Intel’s Fab 17 (200mm) in Hudson, MA; International Rectifier’s 150mm Fab 10 in Newport, South Wales; three fabs (two 150mm, one 125mm) at Renesas Electronics; two outdated NXP fabs (one 100mm, one 150mm) in Nijmegen, The Netherlands; and a 75mm wafer GaAs fab used by Panasonic Semiconductor to produce optoelectronic devices.
The closing of the two NXP fabs was announced a few years ago and was expected to be finalised in 2011, but was delayed due to strong demand for analog and logic ICs and some discrete components that are manufactured at these facilities. A 200mm fab continues to operate in Nijmegen.
As the cost of new wafer fabs and manufacturing equipment skyrockets, IC Insights expects several more companies to shutter older fabs and transition to a fab-lite or fabless business model in the coming years—good news that for foundries but bad news for equipment and material suppliers.
Anritsu has introduced a range of low-cost vector network analysers (VNAs) for s-parameter measurement of passive components, cables, connectors, filters, and antennas.
The VNAs can perform the single-ended and mixed-mode S-parameter measurements typically required for production testing of passive devices, offering frequency coverage up to 40GHz. They can also conduct path loss characterisation of more complex systems.
Prices start at €10,000 (£8,070) for the MS46322A two-port model.
The slimmed down VNAs, branded ShockLine, have no display or keypad, and are controlled remotely by computer via a LAN or other connection.
The MS46522A VNA features a 70µs/point sweep speed, greater than 110dB dynamic range and corrected directivity of greater than 42dB. The MS46524A four-port model is for differential and multi-port device testing up to 7GHz. The two-port MS46522A is priced at €19,700 (£15,830)and the 4-port MS46524A is priced at €25,500 (£20,599).
The VNAs use SCPI command programming and have software driver support, so they can be easily integrated into most programming environments.
Melexis Technologies has introduced a Hall-effect switch device with an integrated voltage regulator and on-chip non-volatile memory. On-chip EEPROM is used to enable the various tolerances that need to be defined for a specific application to be set, via the device’s Vdd pin, which can be readjusted before finally being locked.
“The range and resolution of programmable magnetic thresholds and thermal sensitivity coefficients allows the sensor, working in conjunction with a magnet, to easily implement a ferrous metal proximity-sensing system,” says the supplier.
It says the temperature compensation programmability of the MLX92242 means it can be used with all kinds of magnets, including the low-cost ferrite materials. It supports two-wire rather than a three-wire implementation, only using the Vdd and GND pins, but still providing all the necessary diagnostic capacity to respond to malfunctions.
“The advantage of this is that far less wiring/cable harnessing is needed, allowing deployment into confined spaces and reducing the overall weight in applications where this could otherwise be a disadvantage. The voltage range, which covers 2.7V to 24V, enables design flexibility to be maximised,” says the company.
Likely automotive applications include seat-belt latch detectors and seat position sensors. Designed for automotive and industrial environments, the device has a very high resilience to electro-static discharge (ESD) , with 8kV human body mode ESD compliance, and operational temperature range spans from -40°C to 150°C.
Reverse supply voltage and under-voltage lockout protection mechanisms are incorporated.
It is supplied as either a three-pin TO-92-Flat for through-hole mount assembly or in three-pin TSOT for surface mount assembly.
Researchers at Harvard School of Engineering have observed that graphene electrons exhibit mass when they move together, although they are individually mass-less.
Professor Donhee Ham and Dr Hosang Yoon have successfully measured the collective mass of ‘massless’ electrons in motion in graphene.
By shedding light on the fundamental kinetic properties of electrons in graphene, this research may also provide a basis for the creation of circuits with graphene-based components.
“Graphene is a unique material because, effectively, individual graphene electrons act as though they have no mass. What that means is that the individual electrons always move at a constant velocity,” explains Ham. “But suppose we apply a force, like an electric field. The velocity of the individual electrons still remains constant, but collectively, they accelerate and their total energy increases—just like entities with mass. It’s quite interesting.”
Without this mass, the field of graphene plasmonics cannot work, so Ham’s team knew it had to be there—but until now, no one had accurately measured it.
“One of the greatest contributions of this work is that it is actually an extremely difficult measurement,” says Ham.
As Newton’s second law dictates, a force applied to a mass must generate acceleration. Yoon and Ham knew that if they could apply an electric field to a graphene sample and measure the electrons’ resulting collective acceleration, they could then use that data to calculate the collective mass.
But the graphene samples used in past experiments were replete with imperfections and impurities—places where a carbon atom was missing or had been replaced by something different. In those past experiments, electrons would accelerate but very quickly scatter as they collided with the impurities and imperfections.
“The scattering time was so short in those studies that you could never see the acceleration directly,” says Ham.
To overcome the scattering problem, several smart changes were necessary.
The team was able to reduce the number of impurities and imperfections by sandwiching the graphene between layers of hexagonal boron nitride, an insulating material with a similar atomic structure, and by designing a better way to connect electrical signal lines to the sandwiched graphene.
Yoon and Ham applied an electric field at a microwave frequency, which allows for the direct measurement of the electrons’ collective acceleration in the form of a phase delay in the current.
“By doing all this, we translated the situation from completely impossible to being at the verge of either seeing the acceleration or not,” says Ham. “However, the difficulty was still very daunting, and Hosang made it all possible by performing very fine and subtle microwave engineering and measurements—a formidable piece of experimentation.”
Collective mass is a key aspect of explaining plasmonic behaviors in graphene. By demonstrating that graphene electrons exhibit a collective mass and by measuring its value accurately, Yoon says, “We think it will help people to understand and design more sophisticated plasmonic devices with graphene.”
The challenge remains to improve the quality of graphene samples so that the detrimental effects of electron scattering can be further reduced.
Toshiba will provide the battery for the UK’s first 2MW scale lithium-titanate battery based Energy Storage System (ESS) to support grid management. Toshiba’s 1MWh SCiB battery will be installed in a primary substation in September.
Large-scale ESS are increasingly seen as a versatile solution in managing electricity supply. Installed in wind and photovoltaic generation systems, ESS can help to overcome intermittent output and frequency fluctuations, as well as performing peak power buffering, and when connected to the grid they can support grid stability and reinforcement.
This role in grid management will be investigated in the UK, in the Grid Connected Energy Storage Research Demonstrator project, led by the University of Sheffield, funded by the Engineering and Physical Sciences Research Council (EPSRC), with support from both industrial and academic partners.
The ESS will be connected to the 11kV grid at Western Power Distribution’s Willenhall primary substation, near Wolverhampton in the West Midlands. When the project starts operation in November this year, it will allow testing at realistic levels, and allow assessment of both the technical and economic potential of ESS in the grid.
Toshiba’s SCi is a lithium-titanate based secondary battery capable of over 10,000 charge-discharge cycles with and aclow risk of fire – a danger associated with other lithium-ion batteries.
Micron had revenue of $3.98 billion and net income of $806 million for the three months to the end of May. It expects $4 billion to $4.2 billion revenues in the current quarter.
Gross margin was 34% and free cash flow was $880 million based on operating cash flow of $1.46 billion less capex of $576 million
Although Micron says that demand is growing for all its products, it is not planning to build new fabs.
“Driven by a slowing rate of technology migration, supply bit growth trends have stabilised at a level below historical average,” says CEO Mark Durcan, “there appear to be only limited additions of new wafer capacity on the horizon
In the case of NAND, there is not much point building fabs for planar NAND when 3D NAND, which requires a different tool-set to planar NAND, is on the way.
Micron is cagey about its introduction of 3D NAND. “We have said that we believe that this is going to be a material impact on the industry in the second half of 2015,” says Durcan.
The likely last generation of planar NAND will be the 16nm generation where Micron has been struggling to get a triple level cell (TLC) memory to market.
“We are aggressively working on our development of our 16-nanometer TLC roadmap in an effort to drive our overall NAND cost competitiveness,” says Micron president Mark Adams, “we expect to see component samples of our 16-nanometer TLC by the end of calendar year with client-based TLC SSD by spring of 2015.”
Micron anticipates its ‘termination benefits’ cost – mainly for the Italian researchers’ job losses – to be in the region of $15 million to $25 million.
Xilinx, and Pico Computing have made available now a 15Gb/s Hybrid Memory Cube (HMC) interface for All Programmable UltraScale devices.
The Xilinx UltraScale devices support the HMC bandwidth of 4 lanes, comprised of 64 transceivers running up to 15Gb/s.
Pico Computing’s HMC controller IP offers high memory bandwidth.
“Customers can now leverage the industry’s only shipping 20nm FPGAs along with a validated IP core to bring their 15Gb/s HMC designs to market today,” says Xilinx’s Tamara Schmitz, “UltraScale FPGAs are the only devices currently available that can support all four HMC lanes to enable full memory bandwidth with additional transceivers for datapath and control signals.”
Altera’s Interlaced Look-Aside intellectual property (IP) core has been is compatible with Cavium’s NEURON Search Processor and is available now.
The core provides networking OEMs with a packet interface for use in routers, switches, firewalls, and security storage.
The core is integrated in Altera’s Arria 10 and Stratix V FPGAs and enables interoperability between a datapath device and a look-aside coprocessor with transfer rates up to 300 Gbps delivering 500 million packets per second performance.
The core has both soft and hardened logic blocks offering lane and data rate configuration flexibility for optimal integration.
Altera and Cavium tested and verified the Core using a Stratix V FPGA and a NEURON Search Processor.
An interoperability report is available from Altera that describes the testing methods and performance metrics achieved using Altera’s Interlaken Look-Aside IP core interfacing with Cavium’s NEURON Search Processor.