2021年7月1日 星期四

SiFive approves Imperas Risc-V simulation models

Risc-V intellectual property creator SiFive has qualified models for its core portfolio from Oxford-based Imperas Software. Imperas’ models for SiFive processor IP are an instruction accurate programmer’s representation with full functionality including user, privileged, system and debug modes, plus configuration options for Risc-V vector extensions and custom instructions. “The models deliver simulation of 100s to 1,000s ...

This story continues at SiFive approves Imperas Risc-V simulation models

Or just read more coverage at Electronics Weekly



from News – Electronics Weekly https://ift.tt/3yalrmu
via Yuichun

沒有留言:

張貼留言