Taiwanese DRAM design specialist Etron Technology has joined Lattice Semiconductor to develop a miniaturised AI+DRAM platform for applications to terminal edge computing, industrial robots, and multimedia such as AR/VR, says Digitimes. The platform contains Etron’s newly developed RPC (Reduced Pin Count) DRAM architecture (pictured) which has x16 DDR3 – LPDDR3 bandwidth but uses only 22 ...
This story continues at Etron and Lattice develop AI+DRAM platform
Or just read more coverage at Electronics Weekly
from News – Electronics Weekly https://ift.tt/2MAlBOO
via Yuichun
沒有留言:
張貼留言