Gowin GW1N FPGA
Twenty-month-old Gowin Semiconductor of Guangdong has a two-device family of FPGAs called GW1N – GW1N-1K and GW1N-9K.
They are made on TSMC’s 55nm process with an embedded flash block which can be randomly accessed.
According to Gowin they have up to 9K LUTs; up to 198K embedded block SRAM bits and nearly 20K Shadow SRAM bits; up to 2 million user flash memory bits; up to 20 dedicated 18×18 multipliers and accumulators; up to 276 I/O which include 44 true LVDS output and also support PLLs and DLLs applications.
Packages include WLCSP25, QFN32, LQFP100, LQFPQ44, MBGA160, BGA204, PBGA256, and PBGA484.
The FPGAs have an “instant on” when powering up and support two types of core Vcc devices: LV and UV. It also supports multiple IO standards and protocols, JTAG, MSPI configuration and a dual boot option.
The front end of Gowin design flow is supported by Synplify of Synopsys. The back end of the design flow is supported by proprietary Gowin tools. From HDL/RTL to bit stream data file generation, the entire design flow is covered.
Gowin expects to provide engineering samples and an evaluation board in Q4, 2015.
from News http://ift.tt/1KGH2ah
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