Analog Bits IP on GloFo 12nm

Analog Bits has put its analogue and mixed signal IP design kits on Globalfoundries’ 12nm Leading-Performance (12LP) process technology. The  IP portfolio includes wide range fractional Phase-Lock Loop (PLL) with Spread Spectrum Clock Generation (SSCG), PCIe reference clock PLL subsystem, Process, Voltage, and Temperature (PVT) Sensor and Power-On-Reset (POR) circuitry. Silicon Reports based on these ...

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