At Embedded World this morning, RISC-V International announced approval of its E-Trace (Efficient Trace for Risc-V) and SBI (RISC-V supervisor binary interface) specifications. E-Trace defines an approach to processor tracing that uses a branch trace, intended for debugging any size of application up to super computers. The documentation specifies the signals between the RISC-V core ...
This story continues at Embedded World: RISC-V rattifies Efficient Trace and Supervisor Binary Interface
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