2020年3月18日 星期三

Trace and debug for RISC-V IP

SiFive has announced hardware trace and debug for RISC-V processor IP. Called SiFive Insight, it is “industry’s first combined trace and debug solution for the freely-available, open-specification RISC-V ISA”, said SiFive. it is intended to “meet customer demand and expectations for the capability to access, observe, and control products deploying SiFive’s RISC-V Core IP portfolio”. ...

This story continues at Trace and debug for RISC-V IP

Or just read more coverage at Electronics Weekly



from News – Electronics Weekly https://ift.tt/2xIyUYF
via Yuichun

沒有留言:

張貼留言