In a world of RISC processors, QuickLogic created a CISC co-processor for its EOS multi-core sensor hub chip to save power in wearables. The co-processing core is called the ‘flexible fusion engine’ (FFE, diagram below). “We worked out the power needed to do a 32bit read from memory was 10x the power needed for multiplication, and ...
CISC sometimes beats RISC in wearables
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