The Spec Dilemma

Specifying a product may seem straightforward, but is it really?



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EEVblog #688 – How To Rework Solder SMD Chips – BTTF Time Circuits Repair!

Dave shows you how to rework and replace a blown SSOP surface mount SMD chip with ChipQuik, solder wick, and drag soldering. And also mentions other methods using a hot air gun and pre-heater.

Can he fix the Back To The Future Time Circuits and restore the timeline to it’s original order?

Bonus rant about the lack of PDF schematics in Github projects.

The BTTF Time Circuits were designs and made by Shackspace

Video of Dave blowing up the Time Circuits:

Forum HERE

from EEVblog - The Electronics Engineering Video Blog http://www.eevblog.com/2014/12/01/eevblog-688-how-to-rework-solder-smd-chips-bttf-time-circuits-repair/

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Tesla is not Nvidia’s only HPC processor

Graphics processor firm Nvidia sees a big opportunity for its GPUs in high performance computing (HPC), sometimes referred to as supercomputing.

Nvidia-Tesla-K80

GPUs differ from the CPUs of Intel, IBM and AMD used in PCs and servers because they at every good at number-crunching. That is GPUs are designed to process data very quickly, but do not have the programmable flexibility of CPUs.

Maybe a decade ago research showed that by using many GPUs in a low latency (ie with high speed interconnect) it was possible to create a powerful number-crunching supercomputer for a fraction of the cost of bespoke HPC hardware.

Nvidia has seized the opportunity. It designed a new type of high-end GPU called Tesla, which was good at being cascaded in an HPC array.

Part of the Tesla Accelerated Computing Platform, K80 dual-GPU accelerator is designed for number-crunching operations such as machine learning, data analytics, and scientific computing – collectively known as HPC.

In Tesla there are two GPUs per board with 12Gbyte of GDDR5 memory each (12Gbyte/board). Memory bandwidth is 480Gbyte/s.

There are 4,992 CUDA parallel processing cores.

But Nvidia is not only relying on Tesla for its HPC strategy. It has a plan to create an HPC from 2,000 Tegra K1 mobile processors.

Nvidia is working with IDT and Orange Silicon Valley to develop a scalable, low-latency cluster Tegra K1 mobile processors using RapidIO interconnect to create 16Gbit/s data interfaces between processor nodes.

There will be 60 processor nodes on a 19-inch 1U board, with more than 2,000 nodes in a rack.

This can provide computing power of up to 23Tflops per 1U server, or greater than 800Tflops of computing per rack.

This is twice the computing density of the largest supercomputer, Tianhe-2 in China.

“By integrating a large volume of low-power GPUs in a server rack at scale, this industry first creates a clear path to massive cloud-based clusters for analytics and gaming,” commented Jag Bolaria of the Linley Group.

richard wilson

from News http://www.electronicsweekly.com/news/components/microprocessors-and-dsps/tesla-nvidias-hpc-processor-2014-11/

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Top 10 Undergrad Supply Chain Programs

More than ever before, undergrads who are looking to enter the supply chain profession can choose from plenty of programs.



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Chip Market for Wireless Sensor Networks on 23% CAGR

Wireless sensor networks market will grow to $12 billion industry by 2020, says San-Francisco based market analyst firm.



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Potential Pot of Gold in Mobile Marketing

There are billions of smartphones and tablets out there that represent a captive audience for marketeers. However, mobile marketing is relatively new and has been slow to take off.



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Gyroscope Accuracy Beats MEMS

Qualtre claims its bulk acoustic wave (BAW) beats tuning fork.



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